The present invention relates to a multi-bit sigma/delta converter having particularly good linearity characteristics, wherein dynamic element matching is performed internally.
A reliable high-quality analog/digital conversion is needed, e.g., for digital receiver circuits in the mobile radio field in order to convert analog received signals with low noise into digital signals without frequency influences from adjacent transmission channels occurring. Furthermore, the conversion should be as linear as possible and achieve good resolution.
In the past, sigma/delta analog converters were used for this purpose. Such sigma/delta analog to digital converters are operated with particularly high oversampling and, at the same time, perform certain filtering of the analog input signal and of the quantization noise. During the sigma/delta conversion or a sigma/delta modulation, a feedback signal is subtracted from an analog input signal and subjected to filtering, in most cases integration. The integrated signal is digitally converted by a quantizer which is constructed, for example, as a flash analog/digital converter and output as output signal of the corresponding sigma/delta modulator. The analog feedback signal is obtained from the digital output signal by a feedback signal digital/analog converter.
Depending on the design of the filter device, the sigma/delta converter is a discrete-time or continuous-time converter. In the discrete-time design, the filter H(z) is usually built up from switched capacitors (switch capacitor filter), whereas in the continuous-time sigma/delta converters, the corresponding loop filter is built up of a continuous-time filter H(s), for example by an operational amplifier resistance-capacitance filter circuit.
The linearity characteristics of the sigma/delta converter are essentially determined by the linearity of the feedback digital/analog converter. In order to improve the linearity, the method of dynamic element matching is frequently used. In this method, the positions of the bits of a digital output signal present in thermometer code are randomly exchanged, for example from clock cycle to clock cycle. In consequence, the converter elements of the digital/analog converter driven with such a thermometer code are thus uniformly used and driven with equal frequency on average. A mismatch of the converter elements is thus balanced out statistically so that a high linearity of the conversion result is achieved.
FIG. 1 shows a conventional sigma/delta modulator with dynamic element matching.
The multi-bit sigma/delta converter MSD is constructed with N feedback loops, wherein the analog input signal VIN is first conducted through a serial chain of integrators I1, I2, IN and is then supplied to a quantizer Q as quantizer input signal QIN. The quantizer Q supplies the digital output signal VOUT. The integrators I1, I2, IN are in each case preceded by an adder A1, A2, AN via which a respective feedback signal FB1, FB2, FN is subtracted from the respective output signal Z1, Z2, ZN of the preceding integrator I1, I2, IN.
The feedback signals FB1, FB2, FBN are obtained by feedback digital/analog converters FBD1, FBD2, FBDN from the digital output signal VOUT which is processed via a device for digital element matching DEM. During this process, the signal VSO is analog converted by the feedback digital/analog converters FBD1, FBD2, FBDN and loaded with respective weighting factors b1, b2, bn by amplifiers V1, V2, VN. The integrators I1, I2, IN also have gain factors a1, a2, an. A desired filtering can be set by selection of the weighting factors b1, b2, bn and/or gain factors a1, a2, an.
The device for dynamic element matching DEM exchanges the positions of the bits, present, for example, in thermometer code, of the digital output signal VOUT. The disadvantageous factor when using dynamic element matching is the signal delay time in the corresponding control loop generated by this means. In the ideal case, the converter elements, for example current sources of the feedback digital/analog converter should respond simultaneously with the clock of the quantizer Q. The delay time between the conversion time of the quantizer and the presence of an analog feedback signal by the feedback digital/analog converter is called the excess loop delay (ELD).
The excess loop delay reduces the dynamic range of the sigma/delta modulator and impairs the stability of the control loop, particularly in the innermost feedback path which is implemented by the converter FBDN and the amplifier VN. Therefore, one can perform the dynamic element matching already in the quantizer Q. The reference voltages for the comparators provided in the quantizer are exchanged there from clock cycle to clock cycle so that the correspondingly modified quantizer device already outputs a randomized thermometer code. The disadvantageous factor is the high circuit complexity for the quantizer and the restriction to flash analog/digital converters as quantizers.
FIG. 2 shows a multi-bit sigma/delta converter MSD with feed forward loops for implementing the filter function of the modulator. In this arrangement, only one feedback loop is formed from a DEM device DEM, a feedback digital/analog converter FBD1 and an amplifier V1′. The analog input signal VIN is conducted through a serial chain of integrators I1, I2, IN, the output signals Z1, Z2, ZN of the integrators I1, I2, IN being picked up and supplied to feed forward amplifiers V1, V2, VN which have a respective gain factor c1, c2, cN.
Before the quantizer Q, the feed forward signals FF1, FF2 generated by the amplifiers V1, V2, VN are combined by an adder AN and supplied to the quantizer Q as quantizer input signal QIN.
In this feed forward architecture, there is a large excess loop delay which is not compensated even by the feedback digital/analog converter FBD1. Since inaccuracies, for example linearity deficits of the feedback digital/analog converter FBD1 have a direct effect on the input signal VIN, elaborate calibration of the digital/analog converter FBD1 is performed and/or a device for dynamic element matching may be additionally implemented.
It is therefore desirable to provide an improved multi-bit sigma/delta converter which has a large dynamic range and high stability.